scc

simple c99 compiler
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commit fbfd556e6d215320ed8b8105482616b5f4eafa86
parent 3b2d87bffa663ba8b3204d231eaf4c22c75146c9
Author: Roberto E. Vargas Caballero <k0ga@shike2.com>
Date:   Tue, 14 Sep 2021 14:47:48 +0200

libc: Update arch/arm64

This code is being updated out of the tree of scc and
it is time to synchroniza both copies now.

Diffstat:
Msrc/libc/arch/arm64/Makefile | 4++--
Msrc/libc/arch/arm64/crt-posix.s | 9+++++----
Msrc/libc/arch/arm64/longjmp.s | 10+++++-----
Msrc/libc/arch/arm64/setjmp.s | 10+++++-----
4 files changed, 17 insertions(+), 16 deletions(-)

diff --git a/src/libc/arch/arm64/Makefile b/src/libc/arch/arm64/Makefile @@ -1,9 +1,9 @@ .POSIX: -DIRS =\ +PROJECTDIR = ../../../.. +DIRS = \ linux\ -PROJECTDIR =../../../.. include $(PROJECTDIR)/scripts/rules.mk include ../../rules.mk diff --git a/src/libc/arch/arm64/crt-posix.s b/src/libc/arch/arm64/crt-posix.s @@ -6,9 +6,10 @@ _start: ldr x0,[sp] /* argc */ add x1,sp,#8 /* argv */ - add x2,x1,x0,lsl #3 /* argv = argc + 8*argc + 8 */ - add x2,x2,#8 - adr x3,_environ - str x2,[x3] + adr x2,_environ + add x9,x1,x0,lsl #3 /* envp = argc + 8*argc + 8 */ + add x9,x9,#8 + ldr x9,[x9] + str x9,[x2] bl main b exit diff --git a/src/libc/arch/arm64/longjmp.s b/src/libc/arch/arm64/longjmp.s @@ -9,12 +9,12 @@ longjmp: ldp x25, x26, [x0,#48] ldp x27, x28, [x0,#64] ldp x29, x30, [x0,#80] - ldr x2, [x0,#104] + ldr x2, [x0,#96] mov sp, x2 - ldp d8 , d9, [x0,#112] - ldp d10, d11, [x0,#128] - ldp d12, d13, [x0,#144] - ldp d14, d15, [x0,#160] + ldp d8 , d9, [x0,#104] + ldp d10, d11, [x0,#120] + ldp d12, d13, [x0,#136] + ldp d14, d15, [x0,#152] mov x0, x1 cbnz x1, 1f diff --git a/src/libc/arch/arm64/setjmp.s b/src/libc/arch/arm64/setjmp.s @@ -11,10 +11,10 @@ setjmp: stp x27, x28, [x0,#64] stp x29, x30, [x0,#80] mov x2, sp - str x2, [x0,#104] - stp d8, d9, [x0,#112] - stp d10, d11, [x0,#128] - stp d12, d13, [x0,#144] - stp d14, d15, [x0,#160] + str x2, [x0,#96] + stp d8, d9, [x0,#104] + stp d10, d11, [x0,#120] + stp d12, d13, [x0,#136] + stp d14, d15, [x0,#152] mov x0, #0 ret