scc

commit 1a8211822166322c8609ee15179aaf13d028d4e6
parent 0b19a1e2b9888143055e370ba241afd34c3ee00d
Author: Roberto E. Vargas Caballero <k0ga@shike2.com>
Date:   Thu, 11 Nov 2021 14:54:03 +0100

cc2/qbe: Move sethi() next to complex()

Sethi() and complex() are vry related so it is better to have
them very near to share the same comment.

Diffstat:
M
src/cmd/cc/cc2/target/qbe/cgen.c
 | 
136
++++++++++++++++++++++++++++++++++++++++----------------------------------------

1 file changed, 68 insertions(+), 68 deletions(-)
diff --git a/src/cmd/cc/cc2/target/qbe/cgen.c b/src/cmd/cc/cc2/target/qbe/cgen.c
@@ -72,6 +72,19 @@ static char opasmd[] = {
 
 extern Type int32type, uint32type, ptrtype;
 
+/*
+ * This is strongly influenced by
+ * http://plan9.bell-labs.com/sys/doc/compiler.ps (/sys/doc/compiler.ps)
+ * calculate addresability as follows
+ *     AUTO => 11          value+fp
+ *     REG => 11           reg
+ *     STATIC => 11        (value)
+ *     CONST => 11         $value
+ * These values of addressability are not used in the code generation.
+ * They are only used to calculate the Sethi-Ullman numbers. Since
+ * QBE is AMD64 targered we could do a better job there, and try to
+ * detect some of the complex addressing modes of these processors.
+ */
 static Node *
 complex(Node *np)
 {
@@ -95,6 +108,61 @@ complex(Node *np)
 	return np;
 }
 
+Node *
+sethi(Node *np)
+{
+	Node *lp, *rp;
+
+	if (!np)
+		return np;
+
+	np->complex = 0;
+	np->address = 0;
+	lp = np->left;
+	rp = np->right;
+
+	switch (np->op) {
+	case OAUTO:
+	case OREG:
+	case OMEM:
+	case OCONST:
+		np->address = 11;
+		break;
+	case OASSIG:
+		if (lp->op == OCAST) {
+			Node *tmp = node(OCAST);
+			tmp->type = lp->left->type;
+			tmp->left = rp;
+			tmp->right = NULL;
+			rp = tmp;
+			tmp = lp;
+			lp = lp->left;
+			delnode(tmp);
+		}
+		goto binary;
+	case OCPL:
+		assert(np->type.flags & INTF);
+		np->op = OBXOR;
+		rp = constnode(NULL, ~(TUINT) 0, &np->type);
+		goto binary;
+	case OSNEG:
+		np->op = OSUB;
+		rp = lp;
+		lp = constnode(NULL, 0, &np->type);
+		if ((np->type.flags & INTF) == 0)
+			lp->u.f = 0.0;
+	default:
+	binary:
+		lp = sethi(lp);
+		rp = sethi(rp);
+		break;
+	}
+	np->left = lp;
+	np->right = rp;
+
+	return complex(np);
+}
+
 static Node *
 load(Type *tp, Node *np)
 {
@@ -657,71 +725,3 @@ cgen(Node *np)
 	}
 	return NULL;
 }
-
-/*
- * This is strongly influenced by
- * http://plan9.bell-labs.com/sys/doc/compiler.ps (/sys/doc/compiler.ps)
- * calculate addresability as follows
- *     AUTO => 11          value+fp
- *     REG => 11           reg
- *     STATIC => 11        (value)
- *     CONST => 11         $value
- * These values of addressability are not used in the code generation.
- * They are only used to calculate the Sethi-Ullman numbers. Since
- * QBE is AMD64 targered we could do a better job there, and try to
- * detect some of the complex addressing modes of these processors.
- */
-Node *
-sethi(Node *np)
-{
-	Node *lp, *rp;
-
-	if (!np)
-		return np;
-
-	np->complex = 0;
-	np->address = 0;
-	lp = np->left;
-	rp = np->right;
-
-	switch (np->op) {
-	case OAUTO:
-	case OREG:
-	case OMEM:
-	case OCONST:
-		np->address = 11;
-		break;
-	case OASSIG:
-		if (lp->op == OCAST) {
-			Node *tmp = node(OCAST);
-			tmp->type = lp->left->type;
-			tmp->left = rp;
-			tmp->right = NULL;
-			rp = tmp;
-			tmp = lp;
-			lp = lp->left;
-			delnode(tmp);
-		}
-		goto binary;
-	case OCPL:
-		assert(np->type.flags & INTF);
-		np->op = OBXOR;
-		rp = constnode(NULL, ~(TUINT) 0, &np->type);
-		goto binary;
-	case OSNEG:
-		np->op = OSUB;
-		rp = lp;
-		lp = constnode(NULL, 0, &np->type);
-		if ((np->type.flags & INTF) == 0)
-			lp->u.f = 0.0;
-	default:
-	binary:
-		lp = sethi(lp);
-		rp = sethi(rp);
-		break;
-	}
-	np->left = lp;
-	np->right = rp;
-
-	return complex(np);
-}