qbe

commit e0b94a3d6ade2f99ded481318e9e6d9f16953662
parent 097dc86c45cc2f20cf98ec0385dbb57aaba419ec
Author: Michael Forney <mforney@mforney.org>
Date:   Thu, 11 Mar 2021 19:24:28 -0800

spill: use stronger assertion for registers in use at start of function

Diffstat:
M
amd64/sysv.c
 | 
1
+
M
arm64/abi.c
 | 
1
+
M
spill.c
 | 
6
++++--

3 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/amd64/sysv.c b/amd64/sysv.c
@@ -427,6 +427,7 @@ selpar(Fn *fn, Ins *i0, Ins *i1)
 		fa = argsclass(i0, i1, ac, Opar, &aret, &env);
 	} else
 		fa = argsclass(i0, i1, ac, Opar, 0, &env);
+	fn->reg = amd64_sysv_argregs(CALL(fa), 0);
 
 	for (i=i0, a=ac; i<i1; i++, a++) {
 		if (i->op != Oparc || a->inmem)
diff --git a/arm64/abi.c b/arm64/abi.c
@@ -423,6 +423,7 @@ selpar(Fn *fn, Ins *i0, Ins *i1)
 	curi = &insb[NIns];
 
 	cty = argsclass(i0, i1, ca, &env);
+	fn->reg = arm64_argregs(CALL(cty), 0);
 
 	il = 0;
 	t = tmp;
diff --git a/spill.c b/spill.c
@@ -397,7 +397,6 @@ spill(Fn *fn)
 		bscopy(b->out, v);
 
 		/* 2. process the block instructions */
-		r = v->t[0];
 		curi = &insb[NIns];
 		for (i=&b->ins[b->nins]; i!=b->ins;) {
 			i--;
@@ -469,7 +468,10 @@ spill(Fn *fn)
 			if (r)
 				sethint(v, r);
 		}
-		assert(r == T.rglob || b == fn->start);
+		if (b == fn->start)
+			assert(v->t[0] == (T.rglob | fn->reg));
+		else
+			assert(v->t[0] == T.rglob);
 
 		for (p=b->phi; p; p=p->link) {
 			assert(rtype(p->to) == RTmp);