9os

commit c0304117aa7a69394fdaaa7433847d5de17b6d69
parent 299b8e67bb359595c57b2d6d937d50ce03d917f4
Author: Dimitris Papastamos <dimitris.papastamos@arm.com>
Date:   Mon, 15 Oct 2018 18:28:52 +0100

[arm64] Save the register content on badtrap

Don't call panic as that will clobber x0.

Change-Id: Ie83595eda9176af226c964620b3fadedb22c1205
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>

Diffstat:
M
arch/arm64/arch.s
 | 
31
++++++++++++++++++++++++++++++-

1 file changed, 30 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/arch.s b/arch/arm64/arch.s
@@ -219,8 +219,37 @@ swtch:
 	eret
 
 _badtrap:
+	stp	x1,x0,[sp,#-16]!
+	stp	x3,x2,[sp,#-16]!
+	stp	x5,x4,[sp,#-16]!
+	stp	x7,x6,[sp,#-16]!
+	stp	x9,x8,[sp,#-16]!
+	stp	x11,x10,[sp,#-16]!
+	stp	x13,x12,[sp,#-16]!
+	stp	x15,x14,[sp,#-16]!
+	stp	x17,x16,[sp,#-16]!
+	stp	x19,x18,[sp,#-16]!
+	stp	x21,x20,[sp,#-16]!
+	stp	x23,x22,[sp,#-16]!
+	stp	x25,x24,[sp,#-16]!
+	stp	x27,x26,[sp,#-16]!
+	stp	x29,x28,[sp,#-16]!
+	stp	xzr,x30,[sp,#-16]!
+
+	mrs	x3,S3_6_C4_C0_6		/* SPSR_R */
+	mrs	x2,S3_6_C4_C0_3		/* ELR_R */
+	stp	x3,x2,[sp,#-16]!
+
+	mrs	x3,S3_6_C6_C0_6		/* FAR_R */
+	mrs	x2,S3_6_C5_C2_6		/* ESR_R */
+	stp	x3,x2,[sp,#-16]!
+
+	mov	x3,sp
+	stp	xzr,x3,[sp,#-16]!
+
 	adr	x0,unexpected
-	b	panic
+	mov	x1,sp
+	b	cpanic
 
 	.align	11
 vectbl: