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commit 595430d82e7c226b4ac041186d95ab893fcce9b4
parent e14751df9b6b2621c167741be13773c4ea456fb5
Author: Roberto E. Vargas Caballero <k0ga@shike2.com>
Date:   Mon, 14 Sep 2020 17:49:19 +0200

kernel: Update arm64 architecture

This architecture was configured for rcode.
This new version is ready to be executed at EL1.

Change-Id: I2e01de3f03ba0178f0cf6429f21193006cedc9de

Diffstat:
Mconfig/arm64-9os.mk | 3++-
Mconfig/toolchain/gnu.mk | 2+-
Minclude/9os/9os.h | 2--
Mscripts/fvp.sh | 2+-
Msrc/kernel/arch/native/arm64/arch.s | 43++++++++++++++++---------------------------
Msrc/kernel/arch/native/arm64/crt.s | 40++++++++++++++++++++++++++++------------
Msrc/kernel/arch/native/arm64/ec.h | 7+++----
Msrc/kernel/arch/native/arm64/kernel.c | 3+++
Msrc/kernel/arch/native/arm64/sysreg.lst | 13++++++++-----
Msrc/kernel/panic.c | 13+++----------
10 files changed, 65 insertions(+), 63 deletions(-)

diff --git a/config/arm64-9os.mk b/config/arm64-9os.mk @@ -2,4 +2,5 @@ ARCH = arm64 SYS = 9os MODE = native SYSASFLAGS = $(ARMV81_ASFLAGS) -SYSLDFLAGS = -Ttext=0x80080000 +SYSCFLAGS = $(OS9_CFLAGS) +SYSLDFLAGS = -Ttext=0x880000000 diff --git a/config/toolchain/gnu.mk b/config/toolchain/gnu.mk @@ -13,7 +13,7 @@ ARFLAGS = -U LINKSCRIPT = -T $(CONFDIR)/toolchain/gnu.ld NOPIE_CFLAGS = -nopie NOPIE_LDFLAGS = -nopie -RCODE_CFLAGS = -mgeneral-regs-only +OS9_CFLAGS = -mgeneral-regs-only --no-pie -march=armv8.1-a ARM32_CFLAGS = -marm ARM32_LDFLAGS = -lgcc ARMV81_ASFLAGS = -march=armv8.1-a diff --git a/include/9os/9os.h b/include/9os/9os.h @@ -65,8 +65,6 @@ enum regidx { ESR, SP, FAR, - SCR, - UNUSED, NR_REGS }; diff --git a/scripts/fvp.sh b/scripts/fvp.sh @@ -23,4 +23,4 @@ $FVP_PATH/FVP_Base_RevC-2xAEMv8A \ -C cluster1.cpu2.RVBAR=0x04001000 \ -C cluster1.cpu3.RVBAR=0x04001000 \ --data cluster0.cpu0=$bl31@0x04001000 \ - --data cluster0.cpu0=$os@0x80080000 \ + --data cluster0.cpu0=$os@0x880000000 \ diff --git a/src/kernel/arch/native/arm64/arch.s b/src/kernel/arch/native/arm64/arch.s @@ -4,7 +4,7 @@ .globl panic,halt,intr,swtch,getcontext .globl barrier,vectbl,doswtch,inm8,inm16,inm32 .globl outm8,outm16,outm32 - .globl invdcachesetway,invicache,vectbl,doswtch + .globl invdcachesetway,invicache,vectbl .globl inm8,inm16,inm32,outm8,outm16,outm32 intr: @@ -17,9 +17,9 @@ intr: ret barrier: - adr x1, 1f - lsl x0, x0, #3 - add x1, x1, x0 + adr x1,1f + lsl x0,x0,#3 + add x1,x1,x0 br x1 1: @@ -91,21 +91,17 @@ getcontext: stp x26,x27,[x0,#-16*(19-13)] stp x28,x29,[x0,#-16*(19-14)] - mrs x9,ELR_EL3 + mrs x9,ELR_EL1 stp x9,x30,[x0,#-16*(19-15)] - mrs x9,SPSR_EL3 - mrs x10,ESR_EL3 + mrs x9,SPSR_EL1 + mrs x10,ESR_EL1 stp x9,x10,[x0,#-16*(19-16)] mov x9,sp - mrs x10,FAR_EL3 + mrs x10,FAR_EL1 stp x9,x10,[x0,#-16*(19-17)] - mrs x9,scr_el3 - mov x10,#0 /* unused */ - stp x9,x10,[x0,#-16*(19-18)] - ret exception: @@ -126,21 +122,17 @@ exception: stp x26,x27,[sp,#-16*(19-13)] stp x28,x29,[sp,#-16*(19-14)] - mrs x9,ELR_EL3 + mrs x9,ELR_EL1 stp x9,x30,[sp,#-16*(19-15)] - mrs x9,SPSR_EL3 - mrs x10,ESR_EL3 + mrs x9,SPSR_EL1 + mrs x10,ESR_EL1 stp x9,x10,[sp,#-16*(19-16)] mov x9,sp - mrs x10,FAR_EL3 + mrs x10,FAR_EL1 stp x9,x10,[sp,#-16*(19-17)] - mrs x9,scr_el3 - mov x10,#0 /* unused */ - stp x9,x10,[sp,#-16*(19-18)] - sub sp,sp,#16*19 mov x0,sp mov x29,#0 @@ -154,19 +146,16 @@ outsync: .text swtch: - ldp x9,x10,[x0,#16*18] - msr SCR_EL3,x9 - ldp x9,x10,[x0,#16*17] - msr FAR_EL3,x10 + msr FAR_EL1,x10 mov sp,x9 ldp x9,x10,[x0,#16*16] - msr ESR_EL3,x10 - msr SPSR_EL3,x9 + msr ESR_EL1,x10 + msr SPSR_EL1,x9 ldp x9,x30,[x0,#16*15] - msr ELR_EL3,x9 + msr ELR_EL1,x9 ldp x28,x29,[x0,#16*14] ldp x26,x27,[x0,#16*13] diff --git a/src/kernel/arch/native/arm64/crt.s b/src/kernel/arch/native/arm64/crt.s @@ -1,28 +1,44 @@ - .file "crt.s" .text .globl _start _start: + mrs x0,CurrentEL + ubfx x0,x0,#2,#2 + cmp x0,1 + beq el1 + + /* small bootloader for fvp */ + ldr w0,=0x3c5 + msr SPSR_EL2,x0 + + ldr w0,=0x30D00830 + msr SCTLR_EL1,x0 + + ldr w0,=0x80000000 + msr HCR_EL2,x0 + + ldr x0,=_start + msr ELR_EL2,x0 + eret + +el1: adr x0,vectbl - msr VBAR_EL3,x0 + msr VBAR_EL1,x0 isb /* Differentiate between cold and warm boot (FVP only) */ - mrs x2, mpidr_el1 + mrs x2,mpidr_el1 ldr x1,=0x1c100000 - str w2, [x1, 0x10] - ldr w2, [x1, 0x10] - ubfx w2, w2, 24, 2 - cmp w2, 2 + str w2,[x1,0x10] + ldr w2,[x1,0x10] + ubfx w2,w2,24,2 + cmp w2,2 beq warm - cmp w2, 3 + cmp w2,3 beq warm - ldr x0,=end /* Setup an initial stack */ - mov x1,#0x100f /* 1 page + 15 */ - add x0,x0,x1 - bic x0,x0,#0xf /* Align to 16 bytes */ + ldr x0,=0x880080000 /* Set initial stack */ mov sp,x0 ldr x0,=edata /* BSS clean */ diff --git a/src/kernel/arch/native/arm64/ec.h b/src/kernel/arch/native/arm64/ec.h @@ -5,19 +5,18 @@ enum ecvals { TRAPMCRR = 0x04, /* trapped mcrr or mrrc (coproc == 1111) */ TRAPMCR2 = 0x05, /* trapped mcr or mrc (coproc == 1110) */ TRAPLDC = 0x06, /* trapped LDC or STC */ - TRAPSVE = 0x07, /* trapped SVE */ + TRAPFP = 0x07, /* trapped FP/SIMD access */ TRAPVMRS = 0x08, /* trapped VMRS */ TRAPPTRA = 0x09, /* trapped pointer autentication */ TRAPMCRR2 = 0x0c, /* trapped mcrr or mrrc (coproc == 1110) */ - ILL = 0x0f, /* Illegal execution state */ + ILL = 0x0e, /* Illegal execution state */ SVC32 = 0x11, /* SVC in AArch32 */ HVC32 = 0x12, /* HVC in AArch32 */ - SMC32 = 0x13, /* SVC in AArch32 */ + SMC32 = 0x13, /* SMS in AArch32 */ SVC = 0x15, /* SVC */ HVC = 0x16, /* HVC */ SMC = 0x17, /* SMC */ TRAPSYS = 0x18, /* Trapped MSR, MRS or System instruction */ - SVE = 0x19, /* SVE */ TRAP = 0x1a, /* trapped ERET, ERETAA, ERETAB */ EL3EXCP = 0x1f, /* implementation defined exception to EL3 */ IABORTL = 0x20, /* Instruction abort from lower level */ diff --git a/src/kernel/arch/native/arm64/kernel.c b/src/kernel/arch/native/arm64/kernel.c @@ -62,6 +62,9 @@ imach(Mach *mp, void *stackp) ctx.r[SP] = (unsigned long long) mp->sp; ctx.r[ELR] = 0x4022000; ctx.r[SPSR] = 0xf << 6 | 0xd; + wsysreg(CPACR_EL1, 3<<20); + wsysreg(FPCR, 0); + wsysreg(FPSR, 0); invicache(); invdcache(); diff --git a/src/kernel/arch/native/arm64/sysreg.lst b/src/kernel/arch/native/arm64/sysreg.lst @@ -1,8 +1,11 @@ -ACTLR_EL3 S3_6_C1_C0_1 -SCTLR_EL3 S3_6_C1_C0_0 -RVBAR_EL3 S3_6_C12_C0_1 -VBAR_EL3 S3_6_C12_C0_0 -TPIDR_EL3 S3_6_C13_C0_2 +ACTLR_EL1 S3_0_C1_C0_1 +SCTLR_EL1 S3_0_C1_C0_0 +RVBAR_EL1 S3_0_C12_C0_1 +VBAR_EL1 S3_0_C12_C0_0 +TPIDR_EL1 S3_0_C13_C0_4 CLIDR_EL1 S3_1_C0_C0_1 CCSIDR_EL1 S3_1_C0_C0_0 CSSELR_EL1 S3_2_C0_C0_0 +CPACR_EL1 S3_0_C1_C0_2 +FPCR S3_3_C4_C4_0 +FPSR S3_3_C4_C4_1 diff --git a/src/kernel/panic.c b/src/kernel/panic.c @@ -38,8 +38,6 @@ const char *const regnames[] = { [ESR] = "esr", [SP] = "sp", [FAR] = "far", - [SCR] = "scr", - [UNUSED] = "unused", NULL }; @@ -80,16 +78,11 @@ dumpstack(Context *ctx) void panic(const char *msg) { - static int inhome; + static int first = 1; Context ctx; - if (in_debug) { - kprint(kerr, "panic: %s\n", msg); - longjmp(dbgrecover, 1); - } - - if (!inhome) { - inhome = 1; + if (first) { + first = 0; kprint(kerr, "panic: %s\n", msg); getcontext(&ctx); dumpregs(&ctx, kerr);