9os

commit 0c7db7a7f3e86176a9adc7453d51c590c98be8bb
parent fcc54cb0d2de6d363e9bcf39d085ddc61960c451
Author: Roberto E. Vargas Caballero <k0ga@shike2.com>
Date:   Sun,  1 Nov 2020 10:05:43 +0100

os9/arm64: Check size of asid

To simplify we are going to support only processors with asid of
16 bits, such that we can map the 2 bytes tid in the asid.

Change-Id: I5bcf0733fa504f3cd81cd9879e08b668d1500f2d

Diffstat:
M
src/os9/arch/arm64/mmu.c
 | 
7
++++++-

1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/src/os9/arch/arm64/mmu.c b/src/os9/arch/arm64/mmu.c
@@ -90,8 +90,12 @@
 #define TGRAN4(x) ((x)>>28 & 0xf)
 #define TGRAN64(x) ((x)>>24 & 0xf)
 #define TGRAN16(x) ((x>>20 & 0xf)
+#define ASIDBits(x) ((x)>>4 & 0xf)
 #define PAR(x) ((x) & 0xf)
 
+#define ASID8 0
+#define ASID16 2
+
 /* SPSR */
 #define NF(x) ((unsigned long) (x) << 31)
 #define ZF(x) ((unsigned long) (x) << 30)
@@ -333,7 +337,7 @@ immu(void)
 	uint64_t tcr, mair, id;
 
 	id = sysrd(ID_AA64MMFR0_EL1);
-	if (TGRAN4(id) != 0 || PAR(id) < I1TB)
+	if (TGRAN4(id) != 0 || PAR(id) < I1TB || ASIDBits(id) == ASID8)
 		panic("unsupported mmu");
 
 	/* FIXME: Add Inner properties */
@@ -349,6 +353,7 @@ immu(void)
 
 	tcr =
 		IPS(I1TB) |
+		AS |
 		TG1(G4K) | TG0(G4K) |
 		SH1(OS) | SH0(OS) |
 		ORGN1(WBA) | ORGN0(WBA) |