scc

commit b4960198c9e21102a0c718e32fba9c58d7d9e3e0
parent a158b55f00f75f5071e970122069b3ed7a12f539
Author: Roberto E. Vargas Caballero <k0ga@shike2.com>
Date:   Sun, 22 Sep 2019 14:39:20 +0200

[as-powerpc] Add BCLR and BCLRL instructions

Diffstat:
M
src/cmd/as/as.h
 | 
1
+
M
src/cmd/as/symbol.c
 | 
2
++
M
src/cmd/as/target/powerpc/ins.c
 | 
16
+++++++++++++++-
M
src/cmd/as/target/powerpc/opers.dat
 | 
1
+
M
src/cmd/as/target/powerpc/ops.dat
 | 
3
+++
M
tests/as/execute/powerpc.s
 | 
2
++

6 files changed, 24 insertions(+), 1 deletion(-)
diff --git a/src/cmd/as/as.h b/src/cmd/as/as.h
@@ -32,6 +32,7 @@ enum common_args {
 	ASTR,
 	AREG,
 	ANUMBER,
+	AIMM2,
 	AIMM3,
 	AIMM5,
 	AIMM8,
diff --git a/src/cmd/as/symbol.c b/src/cmd/as/symbol.c
@@ -121,6 +121,8 @@ toobig(Node *np, int type)
 	unsigned long long val = np->sym->value;
 
 	switch (type) {
+	case AIMM2:
+		return val > 3;
 	case AIMM3:
 		return val > 7;
 	case AIMM5:
diff --git a/src/cmd/as/target/powerpc/ins.c b/src/cmd/as/target/powerpc/ins.c
@@ -79,6 +79,7 @@ match(Op *op, Node **args)
 			if ((getclass(np) & class) == 0)
 				return 0;
 			break;
+		case AIMM2:
 		case AIMM5:
 		case AIMM8:
 		case AIMM16:
@@ -221,7 +222,20 @@ x_form(Op *op, Node **args)
 void
 xl_form(Op *op, Node **args)
 {
-	abort();
+	unsigned long ins, bo, bi, bh, lk;
+	unsigned long opcd1, opcd2;
+	long long dst;
+
+	opcd1 = op->bytes[0];
+	opcd2 = op->bytes[1]<<8 | op->bytes[2];
+	lk = op->bytes[3];
+
+	bo = args[0]->sym->value;
+	bi = args[1]->sym->value;
+	bh = args[2]->sym->value;
+
+	ins = opcd1<<26 | bo<<21 | bi<<16 | bh<<11 | opcd2<<1 | lk;
+	emit_packed(ins);
 }
 
 void
diff --git a/src/cmd/as/target/powerpc/opers.dat b/src/cmd/as/target/powerpc/opers.dat
@@ -1,3 +1,4 @@
+imm2	AIMM2
 imm5	AIMM5
 imm8	AIMM8
 imm16	AIMM16
diff --git a/src/cmd/as/target/powerpc/ops.dat b/src/cmd/as/target/powerpc/ops.dat
@@ -54,3 +54,6 @@ BCL	imm5,imm5,imm32	4	16,0,1	b_form	POWERPC
 BCL	imm5,imm5,imm64	4	16,0,1	b_form	POWERPC64
 BCLA	imm5,imm5,imm32	4	16,1,1	b_form	POWERPC
 BCLA	imm5,imm5,imm64	4	16,1,1	b_form	POWERPC64
+
+BCLR	imm5,imm5,imm2	4	19,0,16,0	xl_form	POWERPC,POWERPC64
+BCLRL	imm5,imm5,imm2	4	19,0,16,1	xl_form	POWERPC,POWERPC64
diff --git a/tests/as/execute/powerpc.s b/tests/as/execute/powerpc.s
@@ -8,3 +8,5 @@ L1:	BLA	$L1	# 48 00 00 07
 	BCL	$1,$3,$L2	# 40 23 38 01
 L2:	BCLA	$3,$4,$L2	# 40 64 08 03
 
+	BCLR	$1,$2,$2	# 4C 22 10 20
+	BCLRL	$2,$2,$1	# 4C 42 08 21