scc

commit 8bbcd7c736387e4b73efe3c1e3348802405afb98
parent 7e384c39e59bf20a5027bf6a9d069ab85eb21fbd
Author: Roberto E. Vargas Caballero <k0ga@shike2.com>
Date:   Tue, 19 Dec 2017 16:28:59 +0000

[as-z80] Fix rotations opcodes

Diffstat:
M
as/target/x80/ins.c
 | 
11
+++++++++--
M
as/target/x80/x80.dat
 | 
18
+++++++++---------

2 files changed, 18 insertions(+), 11 deletions(-)
diff --git a/as/target/x80/ins.c b/as/target/x80/ins.c
@@ -249,19 +249,26 @@ r8_r8(Op *op, Node **args)
 }
 
 void
-xx_r8(Op *op, Node **args)
+r8(Op *op, Node **args)
 {
 	Node *par;
 	unsigned char buf[3];
 	int n = op->size;
 
-	par = args[1];
+	par = args[0];
 	memcpy(buf, op->bytes, n);
 	buf[n-1] |= reg2int(par->sym->argtype);
 	emit(buf, n);
 }
 
 void
+xx_r8(Op *op, Node **args)
+{
+	args[0] = args[1];
+	r8(op, args);
+}
+
+void
 r8_xx(Op *op, Node **args)
 {
 	Node *par;
diff --git a/as/target/x80/x80.dat b/as/target/x80/x80.dat
@@ -238,56 +238,56 @@ RRA	none	1	0x1f	noargs	Z80,R800,GB80
 RLD	none	2	0xed,0x6f	noargs	Z80,R800
 RRD	none	2	0xed,0x67	noargs	Z80,R800
 
-RLC	r	2	0xcb,0x00	r8_xx	Z80,R800
+RLC	r	2	0xcb,0x00	r8	Z80,R800
 RLC	(HL)	2	0xcb,0x06	noargs	Z80,R800
 RLC	(IX+n)	4	0xdd,0xcb,0x06	idx	Z80,R800
 RLC	(IY+n)	4	0xfd,0xcb,0x06	idx	Z80,R800
 RLC	(IX+n),r	4	0xdd,0xcb,0,0x00	idx_r8	Z80,R800
 RLC	(IY+n),r	4	0xfd,0xcb,0,0x00	idx_r8	Z80,R800
 
-RL	r	2	0xcb,0x10	r8_xx	Z80,R800
+RL	r	2	0xcb,0x10	r8	Z80,R800
 RL	(HL)	2	0xcb,0x16	noargs	Z80,R800
 RL	(IX+n)	4	0xdd,0xcb,0x16	idx	Z80,R800
 RL	(IY+n)	4	0xfd,0xcb,0x16	idx	Z80,R800
 RL	(IX+n),r	4	0xdd,0xcb,0,0x10	idx_r8	Z80,R800
 RL	(IY+n),r	4	0xfd,0xcb,0,0x10	idx_r8	Z80,R800
 
-RRC	r	2	0xcb,0x08	r8_xx	Z80,R800
-RRC	(HL)	2	0xcb,0x06	noargs	Z80,R800
+RRC	r	2	0xcb,0x08	r8	Z80,R800
+RRC	(HL)	2	0xcb,0x0e	noargs	Z80,R800
 RRC	(IX+n)	4	0xdd,0xcb,0x06	idx	Z80,R800
 RRC	(IY+n)	4	0xfd,0xcb,0x06	idx	Z80,R800
 RRC	(IX+n),r	4	0xdd,0xcb,0,0x08	idx_r8	Z80,R800
 RRC	(IY+n),r	4	0xfd,0xcb,0,0x08	idx_r8	Z80,R800
 
-RR	r	2	0xcb,0x18	r8_xx	Z80,R800
+RR	r	2	0xcb,0x18	r8	Z80,R800
 RR	(HL)	2	0xcb,0x1e	noargs	Z80,R800
 RR	(IX+n)	4	0xdd,0xcb,0x1e	idx	Z80,R800
 RR	(IY+n)	4	0xfd,0xcb,0x1e	idx	Z80,R800
 RR	(IX+n),r	4	0xdd,0xcb,0,0x18	idx_r8	Z80,R800
 RR	(IY+n),r	4	0xfd,0xcb,0,0x18	idx_r8	Z80,R800
 
-SLA	r	2	0xcb,0x20	r8_xx	Z80,R800
+SLA	r	2	0xcb,0x20	r8	Z80,R800
 SLA	(HL)	2	0xcb,0x26	noargs	Z80,R800
 SLA	(IX+n)	4	0xdd,0xcb,0x26	idx	Z80,R800
 SLA	(IY+n)	4	0xfd,0xcb,0x26	idx	Z80,R800
 SLA	(IX+n),r	4	0xdd,0xcb,0,0x20	idx_r8	Z80,R800
 SLA	(IY+n),r	4	0xfd,0xcb,0,0x20	idx_r8	Z80,R800
 
-SLL	r	2	0xcb,0x30	r8_xx	Z80
+SLL	r	2	0xcb,0x30	r8	Z80
 SLL	(HL)	2	0xcb,0x36	noargs	Z80
 SLL	(IX+n)	4	0xdd,0xcb,0x36	idx	Z80
 SLL	(IY+n)	4	0xfd,0xcb,0x36	idx	Z80
 SLL	(IX+n),r	4	0xdd,0xcb,0,0x30	idx_r8	Z80
 SLL	(IY+n),r	4	0xfd,0xcb,0,0x30	idx_r8	Z80
 
-SRA	r	2	0xcb,0x28	r8_xx	Z80,R800
+SRA	r	2	0xcb,0x28	r8	Z80,R800
 SRA	(HL)	2	0xcb,0x2e	noargs	Z80,R800
 SRA	(IX+n)	4	0xdd,0xcb,0x2e	idx	Z80,R800
 SRA	(IY+n)	4	0xfd,0xcb,0x2e	idx	Z80,R800
 SRA	(IX+n),r	4	0xdd,0xcb,0,0x28	idx_r8	Z80,R800
 SRA	(IY+n),r	4	0xfd,0xcb,0,0x28	idx_r8	Z80,R800
 
-SRL	r	2	0xcb,0x38	r8_xx	Z80,R800
+SRL	r	2	0xcb,0x38	r8	Z80,R800
 SRL	(HL)	2	0xcb,0x3e	noargs	Z80,R800
 SRL	(IX+n)	4	0xdd,0xcb,0x3e	idx	Z80,R800
 SRL	(IY+n)	4	0xfd,0xcb,0x3e	idx	Z80,R800