commit 7518639582d76f8e97ee206ffeacd36daab2a0b5
parent be8c6aee7423c00b246e31ab7027637a5f318810
Author: Roberto E. Vargas Caballero <k0ga@shike2.com>
Date: Thu, 28 Dec 2017 16:09:47 +0000
[as-z80] Add input-output instructions
Diffstat:
3 files changed, 52 insertions(+), 24 deletions(-)
diff --git a/as/target/x80/ins.c b/as/target/x80/ins.c
@@ -136,6 +136,7 @@ static int
reg2int(int reg)
{
switch (reg) {
+ case AREG_F:
case AREG_B: return 0;
case AREG_C: return 1;
case AREG_D: return 2;
@@ -404,6 +405,33 @@ idx(Op *op, Node **args)
}
void
+inout(Op *op, Node **args)
+{
+ Node *port, *value;
+ unsigned val;
+ int n = op->size;
+ unsigned char buf[5];
+
+ port = args[0];
+ value = args[1];
+ if (port->addr != ADIRECT && port->addr != AINDIR) {
+ value = port;
+ port = args[1];
+ }
+
+ if (port->addr == ADIRECT)
+ val = port->left->sym->value;
+ else if (value->addr == AREG)
+ val = reg2int(value->sym->argtype) << 3;
+ else
+ val = 0;
+
+ memcpy(buf, op->bytes, n);
+ buf[n-1] |= val;
+ emit(buf, n);
+}
+
+void
rot_bit(Op *op, Node **args)
{
Node *par = args[0];
diff --git a/as/target/x80/x80.dat b/as/target/x80/x80.dat
@@ -315,17 +315,17 @@ RES imm3,(IX+n),r 4 0xdd,0xcb,0,0x80 rot_bit Z80,R800
RES imm3,(IY+n),r 4 0xfd,0xcb,0,0x80 rot_bit Z80,R800
# Input and output group
-IN A,(n) 2 0xdb imm8 Z80,R800
-IN r,(C) 2 0xed,0x40 r8_xx Z80,R800
-IN F,(C) 2 0xed,0x70 noargs Z80,R800
+IN A,(n) 2 0xdb inout Z80,R800
+IN r,(C) 2 0xed,0x40 inout Z80,R800
+IN F,(C) 2 0xed,0x70 inout Z80,R800
INI none 2 0xed,0xa2 noargs Z80,R800
INIR none 2 0xed,0xb2 noargs Z80,R800
IND none 2 0xed,0xaa noargs Z80,R800
INDR none 2 0xed,0xba noargs Z80,R800
-OUT (n),A 2 0xd3 imm8 Z80,R800
-OUT (C),r 2 0xed,0x41 r8_xx Z80,R800
-OUT (C),0 2 0xed,0x71 noargs Z80,R800
+OUT (n),A 2 0xd3 inout Z80,R800
+OUT (C),r 2 0xed,0x41 inout Z80,R800
+OUT (C),0 2 0xed,0x71 inout Z80,R800
OUTI none 2 0xed,0xa3 noargs Z80,R800
OTIR none 2 0xed,0xb3 noargs Z80,R800
OUTD none 2 0xed,0xab noargs Z80,R800
diff --git a/as/target/z80/test.s b/as/target/z80/test.s
@@ -464,7 +464,7 @@
RET %NC / D0
POP %DE / D1
JP %NC,16384 / D2 00 40
-/D3 n OUT (n), A
+ OUT (153),%A / D3 99
CALL %NC,32768 / D4 00 80
PUSH %DE / D5
SUB %A,32 / D6 20
@@ -472,7 +472,7 @@
RET %C / D8
EXX / D9
JP %C,16384 / DA 00 40
-/DB n IN A, (n)
+ IN %A,(153) / DB 99
CALL %C,32768 / DC 00 80
ADD %IX,%BC / DD 09
ADD %IX,%DE / DD 19
@@ -774,46 +774,46 @@
JP %PE,16384 / EA 00 40
EX %DE,%HL / EB
CALL %PE,16384 / EC 00 40
-/ED40 IN B, (C)
-/ED41 OUT (C), B
+ IN %B,(%C) / ED 40
+ OUT (%C),%B / ED 41
SBC %HL,%BC / ED 42
LD (32768),%BC / ED 43 00 80
NEG / ED 44
RETN / ED 45
IM 0 / ED 46
LD %I,%A / ED 47
-/ED48 IN C, (C)
-/ED49 OUT (C), C
+ IN %C,(%C) / ED 48
+ OUT (%C),%C / ED 49
ADC %HL,%BC / ED 4A
LD %BC,(16384) / ED 4B 00 40
RETI / ED 4D
LD %R,%A / ED 4F
-/ED50 IN D, (C)
-/ED51 OUT (C), D
+ IN %D,(%C) / ED 50
+ OUT (%C),%D / ED 51
SBC %HL,%DE / ED 52
LD (32768),%DE / ED 53 00 80
IM 1 / ED 56
LD %A,%I / ED 57
-/ED58 IN E, (C)
-/ED59 OUT (C), E
+ IN %E,(%C) / ED 58
+ OUT (%C),%E / ED 59
ADC %HL,%DE / ED 5A
LD %DE,(16384) / ED 5B 00 40
IM 2 / ED 5E
LD %A,%R / ED 5F
-/ED60 IN H, (C)
-/ED61 OUT (C), H
+ IN %H,(%C) / ED 60
+ OUT (%C),%H / ED 61
SBC %HL,%HL / ED 62
RRD / ED 67
-/ED68 IN L, (C)
-/ED69 OUT (C), L
+ IN %L,(%C) / ED 68
+ OUT (%C),%L / ED 69
ADC %HL,%HL / ED 6A
RLD / ED 6F
-/ED70 IN (C)* / IN F, (C)*
-/ED71 OUT (C), 0*
+ IN %F,(%C) / ED 70
+ OUT (%C),0 / ED 71
SBC %HL,%SP / ED 72
LD (16384),%SP / ED 73 00 40
-/ED78 IN A, (C)
-/ED79 OUT (C), A
+ IN %A,(%C) / ED 78
+ OUT (%C),%A / ED 79
ADC %HL,%SP / ED 7A
LD %SP,(32768) / ED 7B 00 80
LDI / ED A0
