scc

commit 1f60dda2c451783a43a2ead554b4792ee6c9ee92
parent f92c413f7a8a6629366edb729782f4de47ae3c97
Author: Roberto E. Vargas Caballero <k0ga@shike2.com>
Date:   Sun, 17 Dec 2017 09:57:28 +0100

[as-z80] Add 16 bit addressing load instructions

These instructions use the direct addressing mode, between a register
and an immediate address.

Diffstat:
M
as/target/gen.awk
 | 
2
++
M
as/target/x80/ins.c
 | 
14
++++++++++++++
M
as/target/x80/x80.dat
 | 
10
++++++++++

3 files changed, 26 insertions(+), 0 deletions(-)
diff --git a/as/target/gen.awk b/as/target/gen.awk
@@ -93,6 +93,8 @@ function str2args(s, args, i, out, n)
 			out = out "AREG_IX"
 		} else if (match(a, /^regIY/)) {
 			out = out "AREG_IY"
+		} else if (match(a, /^dir/)) {
+			out = out "ADIRECT"
 		} else if (match(a, /^sym/)) {
 			out = out "ASYM"
 		} else if (match(a, /^string/)) {
diff --git a/as/target/x80/ins.c b/as/target/x80/ins.c
@@ -146,6 +146,13 @@ imm16(Op *op, Node **args)
 }
 
 void
+dir(Op *op, Node **args)
+{
+	args[1] = args[1]->left;
+	imm16(op, args);
+}
+
+void
 r8_r8(Op *op, Node **args)
 {
 	Node *par1, *par2;
@@ -208,3 +215,10 @@ r16_imm16(Op *op, Node **args)
 	buf[n-3] |= reg2int(par1->sym->argtype) << 3;
 	emit(buf, n);
 }
+
+void
+r16_dir(Op *op, Node **args)
+{
+	args[1] = args[1]->left;
+	r16_imm16(op, args);
+}
diff --git a/as/target/x80/x80.dat b/as/target/x80/x80.dat
@@ -91,6 +91,16 @@ LD	reg_dd,imm16	3	0x01	r16_imm16	Z80,R800,GB80
 LD	regIX,imm16	4	0xdd,0x21	imm16	Z80,R800
 LD	regIY,imm16	4	0xfd,0x21	imm16	Z80,R800
 
+LD	regHL,dir	3	0x2a	dir	Z80,R800,GB80
+LD	reg_dd,dir	4	0xed,0x4b	r16_dir	Z80,R800
+LD	regIX,dir	4	0xdd,0x2a	dir	Z80,R800
+LD	regIY,dir	4	0xfd,0x2a	dir	Z80,R800
+
+LD	dir,regHL	3	0x22	dir	Z80,R800,GB80
+LD	dir,reg_dd	4	0xdd,0x42	r16_dir	Z80,R800
+LD	dir,regIX	4	0xdd,0x22	dir	Z80,R800
+LD	dir,regIY	4	0xfd,0x22	dir	Z80,R800
+
 ADD	regA,reg_r	1	0x80	xx_r8	Z80,R800,GB80
 ADD	regA,reg_p	2	0xdd,0x80	xx_r8	Z80,R800
 ADD	regA,reg_q	2	0xfd,0x80	xx_r8	Z80,R800